1. Field of the Invention
The invention relates to a comparison circuit, and more particularly to a comparison circuit with an offset averaging scheme.
2. Description of the Related Art
Comparators are widely applied for analog-to-digital conversion. In a conventional analog-to-digital converter, three comparators are required to digitize the input signal into four ranges. Each of the three comparators has a threshold voltage, and the three threshold voltages comprise the largest one among the three threshold voltages, the smallest one among the three threshold voltages, and the middle one between the largest threshold voltage and the smallest threshold voltage. Thus, the four ranges are: the range higher than the largest threshold voltage, the range between the largest threshold voltage and the middle threshold voltage, the range between the middle threshold voltage and the smallest threshold voltage, and the range lower than the smallest threshold voltage. If it is desired to provide several ranges for input signal digitization, a plurality of comparators are required, which increases the size of the analog-to-digital converter.
Thus, it is desired to provide a comparison circuit which adopts offset averaging schemes for analog-to-digital conversion and occupies minimal area. A comparator threshold of the comparison circuit in the invention is realized by comparator built-in offset (or intrinsic offset).